CRC/TRR 404 -


active 3D

CRC/TRR 404 -


active 3D

Research Area A – Devices: Memory & Logic

Devices are one of the most important building blocks of integrated circuits. They derive their electrical characteristics from the properties of the materials they are made of and their functionality from the circuit they are embedded in. Within Research Area A we have therefore grouped projects that are devoted to the exploration of BEOL-compatible logic and memory devices based upon novel device architectures and novel materials. This work is tightly connected to Research Areas B and C in order to ensure that the resulting devices fulfill their targeted functionality in circuit blocks and are manufacturable in a reproducible way employing appropriate BEOL-compatible fabrication processes. Furthermore, fabricated devices will be used to extract parameters for Research Area B and to validate the modeling and simulation work done in Research Area C.

Intermediate Goals of Research Area A

  • Process flows for a BEOL compatible fabrication of the individual devices
  • Performance parameters that can experimentally be realized in the lab process
  • Envisioned performance parameters of the individual devices extrapolated to a scaled technology under the verified boundary conditions for BEOL integration
  • Layout constraints of the individual devices
  • Requirements for connecting to other devices in the same layer and on different layers
  • Expected heat dissipation of the individual devices in a scaled technology

Long-term Goals of Research Area A

  • Full lab based process flows to integrate the devices in reasonable combinations into the BEOL
  • Expected process flows in scaled down technologies to integrate the different devices in reasonable combinations into the BEOL
  • Lab scale demonstrators to verify and highlight the benefits of the ABEOL approach
  • Flexible process routes across the different labs involved in the TRR
  • Flexible connecting elements for two- and three-terminal devices that can be extended towards future device options
  • Effective methods for limiting local heat dissipation hot spots by design measures and methods
    for physical heat distribution

Research Area A - Projects

A01

Co-design of Area-Dependent VCM Cell Arrays and CMOS Circuits for In-Memory Computing

Prof. Regina Dittmann
Dr. Stefan Slesazeck
Clemens Wittberg
Johannes Wilm

A02

Under Voltage Control: Nb2O5 Based Locally Active Threshold Switches

Dr. Stefan Slesazeck
Prof. Ronald Tetzlaff
Eter Mgeladze

A03

Under Voltage Control: Nb2O5 Based Locally Active Threshold Switches

Prof. Sven Ingebrandt
Prof. Matthias Wuttig
Dibyendu Khan
Alexander Kiehn

A05

BEOL-Compatible 3D Reconfigurable Logic

Prof. Joachim Knoch
Dr. Jens Trommer
Zhenao Liu
Katrin Pingen

A06

2D Field-Effect Transistors

Prof. Xinliang Feng
Prof. Max Lemme
Dongqi Li

A07

Vertical Perovskite Field-Effect Transistors

Dr. Maryam Mohammadi
Prof. Yana Vaynzof
Federico Fabrizi
Zuzanna Molenda